1. Technical Field
The present invention relates to an electronic synchronous/asynchronous transceiver device, for instance for power line communication networks and similar systems. More specifically, the invention relates to a transceiver device for power line communication networks of the type integrated into a single chip and operating from a single supply voltage.
2. Description of the Related Art
In this specific technical field it is known on the market a circuit transceiver named “ST7538” which is a half duplex synchronous/asynchronous FSK modem designed for power line communication network applications.
This known circuit operates from a single supply voltage and integrates a line driver and a 5V linear regulator.
The circuit operation is controlled by means of an internal register, programmable through the synchronous serial interface.
Additional functions such as watchdog, clock output, output voltage and current control, preamble detection, time-out, band in use are included.
This circuit is realized in multipower BCD5 technology that allows to integrate DMOS, bipolar and CMOS structures in a same chip.
This known circuit is a multi-frequency device and eight programmable carrier frequencies are available.
However, only one carrier at a time may be used; even if it's possible to switch the communication channel during the normal working mode. When the desired frequency is selected in a control register the transmission and reception filters are accordingly tuned.
This circuit ST7538 exchanges data with the host processor through a serial interface. The data transfer is managed by a couple of lines, while data are exchanged using separate receiving and transmitting lines.
Four are the ST7538 working modes:                data reception;        data transmission;        control register read;        control register write.        
Moreover, two type of communication interfaces are available:                asynchronous;        synchronous.        
The selection can be done through an internal control register.
In the asynchronous mode data are exchanged without any auxiliary clock reference and without adding any protocol bits. The host controller has to recover the clock reference in receiving mode and control the bit time in transmission mode. The receiving line is forced to a low logic level when no carrier is detected.
On the contrary, in the synchronous mode, the circuit allows to interface the host controller using a four line synchronous interface. The circuit is always the master of the communication and provides the clock reference on the control and timing line.
When the circuit is in the receiving mode an internal PLL recovers the clock reference. Data on the receiving line are stable on a rising edge of the control and timing line.
When the circuit is in transmitting mode the clock reference is internally generated and data are read on the transmitting line on the rising edge of the control and timing line.
While being advantageous under many points of view and substantially providing a solution for a large spectrum of modem communication this known circuit is very complex and also very expensive to render it unusable for low cost applications.
For instance, the currently high demand of “outdoor” applications, such as small street lighting controllers and cost effective Automatic Meter Reading (AMR) systems may not be satisfied by the use of the above mentioned prior art solution, if not supporting a higher overall cost.
Moreover, the prior art circuit cannot supply different kinds of controllers that may be connected to the transceiver device in specific applications; this compels providing specific circuit portions on board of each single controller.